Metal gate electrodes are currently being investigated to replace polysilicon gate electrodes in today's ever shrinking and changing transistor devices. One of the principle reasons the industry is investigating replacing the polysilicon gate electrodes with metal gate electrodes is in order to solve problems of poly-depletion effects and boron penetration for future CMOS devices. Traditionally, a polysilicon gate electrode with an overlying silicide was used for the gate electrodes in CMOS devices. However, as device feature size continues to shrink, poly depletion and gate sheet resistance become serious issues when using polysilicon gate electrodes.
Accordingly, metal gates have been proposed. However, in order to optimize the threshold voltage (Vt) in high-performance devices, the metal gates need tunable work functions. For instance, the metal gates need tunable work functions for NMOS and PMOS devices similar to present polysilicon gate technology, requiring the work functions of metal gates to range from 4.1˜4.4 eV for NMOS and 4.8˜5.1 eV for PMOS (see, B. Cheng, B. Maiti, S. Samayedam, J. Grant, B. Taylor, P. Tobin, J. Mogab, IEEE Intl. SOI Conf. Proc., pp. 91-92, 2001).
Recently, silicided metal gates have been investigated based on the extension of existing self-aligned silicide (SALICIDE) technology. In this approach, polysilicon is deposited over the gate dielectric. A metal is deposited over the polysilicon and reacted to completely consume the polysilicon resulting in a fully silicided metal gate, rather than a deposited metal gate. The silicided metal gate provides a metal gate with the least perturbation to the conventional process and avoids contamination issues. Furthermore, poly doping has been shown to affect the work function of the silicided metal gates.
Accordingly, what is needed is a silicided metal gate structure that provides the poly depletion and gate sheet resistance benefits discussed above, without experiencing the drawbacks of the prior art silicided metal gate structures.